Rihards Novickis, Edgars Lielāmurs, Daniels Jānis Justs, Andrejs Cvetkovs, Kaspars Ozols. Spatial Transformation Accelerator with Parallel Data Access Scheme for Sample Reconstruction. Electronics, 13(5), 922 pp. MDPI, 2024.
Bibtex citāts:
Bibtex citāts:
@article{16031_2024,
author = {Rihards Novickis and Edgars Lielāmurs and Daniels Jānis Justs and Andrejs Cvetkovs and Kaspars Ozols},
title = {Spatial Transformation Accelerator with Parallel Data Access Scheme for Sample Reconstruction},
journal = {Electronics},
volume = {13},
issue = {5},
pages = {922},
publisher = {MDPI},
year = {2024}
}
author = {Rihards Novickis and Edgars Lielāmurs and Daniels Jānis Justs and Andrejs Cvetkovs and Kaspars Ozols},
title = {Spatial Transformation Accelerator with Parallel Data Access Scheme for Sample Reconstruction},
journal = {Electronics},
volume = {13},
issue = {5},
pages = {922},
publisher = {MDPI},
year = {2024}
}
Anotācija: Spatial image transformation is a commonly used component in many image processing pipelines. It enables the correction of optical distortions, image registration onto a common reference plane, electronic image stabilisation, digital zoom, video mosaicking, etc. With the growing tendency to embed image processing in low-power devices, attaining an efficient transformation solution becomes increasingly decisive. Furthermore, interpolation is the key operation in achieving the high quality of the transformed data from the original data. Fortunately, different implementations have already seen several efficiency improvements in recent years. However, interpolation relies on sampling a set of neighbouring points from memory, which has yet to be addressed efficiently for smaller computational platforms with limited memory resources. In this work, we derive a generic mathematical model and circuit design principles for the spatial transformation accelerator design for N-dimensional data. Furthermore, we present an efficient simultaneous access scheme for high-quality signal reconstruction. Finally, the introduced ideas are verified in field programmable gate arrays using one-dimensional and two-dimensional data transformation use cases. The presented solution is able to transform images with sizes ranging from 256 × 256 to 8192 × 8192 and achieves a transfer rate of 275 frames per second with 512 × 512 images.
Žurnāla kvartile: Q2