R. Novickis, D. J. Justs, K. Ozols, M. Greitāns. An Approach of Feed-Forward Neural Network Throughput-Optimized Implementation in FPGA. Electronics (Switzerland), 9(12), 1 - 16 pp. 2020.
Bibtex citation:
Bibtex citation:
@article{10078_2020,
author = {R. Novickis and D. J. Justs and K. Ozols and M. Greitāns},
title = {An Approach of Feed-Forward Neural Network Throughput-Optimized Implementation in FPGA},
journal = {Electronics (Switzerland)},
volume = {9},
issue = {12},
pages = {1 - 16},
year = {2020}
}
author = {R. Novickis and D. J. Justs and K. Ozols and M. Greitāns},
title = {An Approach of Feed-Forward Neural Network Throughput-Optimized Implementation in FPGA},
journal = {Electronics (Switzerland)},
volume = {9},
issue = {12},
pages = {1 - 16},
year = {2020}
}
Abstract: Artificial Neural Networks (ANNs) have become an accepted approach for a wide range of challenges. Meanwhile, the advancement of chip manufacturing processes is approaching saturation which calls for new computing solutions. This work presents a novel approach of an FPGA-based accelerator development for fully connected feed-forward neural networks (FFNNs). A specialized tool was developed to facilitate different implementations, which splits FFNN into elementary layers, allocates computational resources and generates high-level C++ description for high-level synthesis (HLS) tools. Various topologies are implemented and benchmarked, and a comparison with related work is provided. The proposed methodology is applied for the implementation of high-throughput virtual sensor. © 2020 by the authors. Licensee MDPI, Basel, Switzerland.